H3C S12500R Ethernet Switch Router Series Config Examples-Release 36xx-6W100

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H3C S12500R Switch Router Series

PTP Configuration Examples

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Copyright © 2021 New H3C Technologies Co., Ltd. All rights reserved.

No part of this manual may be reproduced or transmitted in any form or by any means without prior written consent of New H3C Technologies Co., Ltd.

Except for the trademarks of New H3C Technologies Co., Ltd., any trademarks that may be mentioned in this document are the property of their respective owners.

The information in this document is subject to change without notice.



Introduction

This document provides PTP configuration examples.

Prerequisites

This document is not restricted to specific software or hardware versions.

The configuration examples in this document were created and verified in a lab environment, and all the devices were started with the factory default configuration. When you are working on a live network, make sure you understand the potential impact of every command on your network.

This document assumes that you have basic knowledge of PTP.

Example: Configuring Layer 2 IEEE 1588v2 PTP

Network configuration

As shown in Figure 1, a PTP domain contains Device A, Device B, and Device C. Configure Layer 2 IEEE 1588v2 PTP as follows for time synchronization:

·     Specify the IEEE 1588v2 PTP profile for the devices.

·     Specify the OC clock node type for Device A and Device C, and E2ETC clock node type for Device B. These clock nodes elect a GM through BMC based on their respective default GM attributes.

Figure 1 Network diagram

 

Software version used

This configuration example was created and verified on R3606.

Restrictions and guidelines

By default, interfaces on the device are disabled (in ADM or Administratively Down state). To have an interface operate, you must use the undo shutdown command to enable that interface.

Procedures

Configuring Device A

# Specify the IEEE 1588v2 PTP profile.

<DeviceA> system-view

[DeviceA] ptp profile 1588v2

# Specify the OC clock node type.

[DeviceA] ptp mode oc

# Specify PTP for obtaining the time on the default MDC.

[DeviceA] clock protocol ptp mdc 1

# Enable PTP on HundredGigE 1/0/1.

[DeviceA] interface hundredgige 1/0/1

[DeviceA-HundredGigE1/0/1] ptp enable

[DeviceA-HundredGigE1/0/1] quit

Configuring Device B

# Specify the IEEE 1588v2 PTP profile.

<DeviceB> system-view

[DeviceB] ptp profile 1588v2

# Specify the E2ETC clock node type.

[DeviceB] ptp mode e2etc

# Specify PTP for obtaining the time on the default MDC.

[DeviceB] clock protocol ptp mdc 1

# Enable PTP on HundredGigE 1/0/1.

[DeviceB] interface hundredgige 1/0/1

[DeviceB-HundredGigE1/0/1] ptp enable

[DeviceB-HundredGigE1/0/1] quit

# Enable PTP on HundredGigE 1/0/2.

[DeviceB] interface hundredgige 1/0/2

[DeviceB-HundredGigE1/0/2] ptp enable

[DeviceB-HundredGigE1/0/2] quit

Configuring Device C

# Specify the IEEE 1588v2 PTP profile.

<DeviceC> system-view

[DeviceC] ptp profile 1588v2

# Specify the OC clock node type.

[DeviceC] ptp mode oc

# Specify PTP for obtaining the time on the default MDC.

[DeviceC] clock protocol ptp mdc 1

# Enable PTP on HundredGigE 1/0/1.

[DeviceC] interface hundredgige 1/0/1

[DeviceC-HundredGigE1/0/1] ptp enable

[DeviceC-HundredGigE1/0/1] quit

Verifying the configuration

When the network topology is stable, perform the following tasks to verify the PTP configuration:

·     Use the display ptp clock command to display PTP clock information.

·     Use the display ptp interface brief command to display brief information about PTP interfaces.

# Display PTP clock information on Device A.

[DeviceA] display ptp clock

PTP profile         : IEEE 1588 Version 2

PTP mode            : OC

Slave only          : No
Sync uncertain      : Disabled

Clock state         : Disabled

Clock ID            : 000FE2-FFFE-FF0000

Clock type          : Local

Clock domain        : 0

Number of PTP ports : 1

Priority1     : 128

Priority2     : 128

Clock quality :

 Class                 : 248

 Accuracy              : 32

 Offset (log variance) : 65535

Offset from master : 0 (ns)

Mean path delay    : 0 (ns)

Steps removed      : 0

Local clock time   : Sun Jan 15 20:57:29 2011

Clock source info:

Clock Pri1 Pri2 Accuracy Class TimeSrc Direction In-Status Offset(log variance)

-------------------------------------------------------------------

Local 128  128  32       248   160     N/A       N/A          65535

ToD0  128  128  32       6     32      N/A       Inactive     65535

ToD1  128  128 32        6     32      N/A       Inactive     65535

# Display brief information about PTP interfaces on Device A.

[DeviceA] display ptp interface brief

Name         State         Delay mechanism  Clock step  Asymmetry correction

HGE1/0/1     Master        E2E              Two         0

# Display PTP clock information on Device B.

[DeviceB] display ptp clock

PTP profile         : IEEE 1588 Version 2

PTP mode            : E2ETC

Slave only          : No

Sync uncertain      : Disabled

Clock state         : Disabled

Clock ID            : 000FE2-FFFE-FF0001

Clock type          : Local

Clock domain        : 0

Number of PTP ports : 2

Priority1     : 128

Priority2     : 128

Clock quality :

 Class                 : 248

 Accuracy              : 32

 Offset (log variance) : 65535

Offset from master : N/A

Mean path delay    : N/A

Steps removed      : N/A

Local clock time   : Sun Jan 15 20:57:29 2011

Clock source info:

Clock  Pri1 Pri2 Accuracy Class TimeSrc Direction In-Status Offset(log variance)

-------------------------------------------------------------------

Local   128  128 32       248   160     N/A       N/A       65535    

ToD0    128  128 32       6     32      N/A       Inactive  65535    

ToD1    128  128 32       6     32      N/A       Inactive  65535     

# Display brief information about PTP interfaces on Device B.

[DeviceB] display ptp interface brief

Name         State         Delay mechanism  Clock step  Asymmetry correction

HGE1/0/1     N/A           E2E              Two         0

HGE1/0/2     N/A           E2E              Two         0

# Display PTP clock information on Device C.

[DeviceC] display ptp clock

PTP profile         : IEEE 1588 Version 2

PTP mode            : OC

Slave only          : No

Sync uncertain      : Disabled

Clock state         : Disabled

Clock ID            : 000FE2-FFFE-FF0002

Clock type          : Local

Clock domain        : 0

Number of PTP ports : 1

Priority1     : 128

Priority2     : 128

Clock quality :

 Class                 : 248

 Accuracy              : 32

 Offset (log variance) : 65535

Offset from master : 0 (ns)

Mean path delay    : 0 (ns)

Steps removed      : 0

Local clock time   : Sun Jan 15 20:57:29 2019

Clock source info:

 Clock   Pri1 Pri2 Accuracy Class TimeSrc Direction In-Status Offset(log variance)

 -------------------------------------------------------------------

 Local   128  128  32       248   160     N/A       N/A       65535    

 ToD0    128  128  32       6     32      N/A       Inactive  65535    

 ToD1    128  128  32       6     32      N/A       Inactive  65535  

# Display brief information about PTP interfaces on Device C.

[DeviceC] display ptp interface brief

Name         State         Delay mechanism  Clock step  Asymmetry correction

HGE1/0/1     Slave         E2E              Two         0

The command outputs show that Device A is elected as the GM and HundredGigE 1/0/1 on Device A is the master port.

Configuration files

·     Device A and Device C:

#

 clock protocol ptp mdc 1

#

 ptp profile 1588v2

 ptp mode oc

#

interface hundredgige 1/0/1

 ptp enable

#

·     Device B:

#

 clock protocol ptp mdc 1

#

 ptp profile 1588v2

 ptp mode e2etc

#

interface hundredgige 1/0/1

 ptp enable

#

interface hundredgige 1/0/2

 ptp enable

#

Example: Configuring Layer 3 IEEE 1588v2 PTP in multicast mode

Network configuration

As shown in Figure 2, a PTP domain contains Device A, Device B, and Device C. Configure Layer 3 IEEE 1588v2 PTP in multicast mode as follows for time synchronization:

·     Specify the IEEE 1588v2 PTP profile for the devices.

·     Specify the OC clock node type for Device A and Device C, and the P2PTC clock node type for Device B. These clock nodes elect a GM through BMC based on their respective default GM attributes.

·     Configure the multicast PTP transport mode and IPv4 UDP transport protocol for the devices.

·     Configure the peer delay measurement mechanism (p2p) for Device A and Device C.

Figure 2 Network diagram

 

Software version used

This configuration example was created and verified on R3606.

Restrictions and guidelines

By default, interfaces on the device are disabled (in ADM or Administratively Down state). To have an interface operate, you must use the undo shutdown command to enable that interface.

Procedures

Configuring Device A

# Specify the IEEE 1588v2 PTP profile.

<DeviceA> system-view

[DeviceA] ptp profile 1588v2

# Specify the OC clock node type.

[DeviceA] ptp mode oc

# Configure the source IP address for multicast PTP message transmission over IPv4 UDP.

[DeviceA] ptp source 10.10.10.1

# Specify PTP for obtaining the time on the default MDC.

[DeviceA] clock protocol ptp mdc 1

# On HundredGigE 1/0/1, specify the IPv4 UDP transport protocol and the peer delay measurement mechanism (p2p), and enable PTP.

[DeviceA] interface hundredgige 1/0/1

[DeviceA-HundredGigE1/0/1] ptp transport-protocol udp

[DeviceA-HundredGigE1/0/1] ptp delay-mechanism p2p

[DeviceA-HundredGigE1/0/1] ptp enable

[DeviceA-HundredGigE1/0/1] quit

Configuring Device B

# Specify the IEEE 1588v2 PTP profile.

<DeviceB> system-view

[DeviceB] ptp profile 1588v2

# Specify the P2PTC clock node type.

[DeviceB] ptp mode p2ptc

# Configure the source IP address for multicast PTP message transmission over IPv4 UDP.

[DeviceB] ptp source 10.10.2.1

# Specify PTP for obtaining the time on the default MDC.

[DeviceB] clock protocol ptp mdc 1

# On HundredGigE 1/0/1, specify the IPv4 UDP transport protocol and enable PTP.

[DeviceB] interface hundredgige 1/0/1

[DeviceB-HundredGigE1/0/1] ptp transport-protocol udp

[DeviceB-HundredGigE1/0/1] ptp enable

[DeviceB-HundredGigE1/0/1] quit

# On HundredGigE 1/0/2, specify the IPv4 UDP transport protocol and enable PTP.

[DeviceB] interface hundredgige 1/0/2

[DeviceB-HundredGigE1/0/2] ptp transport-protocol udp

[DeviceB-HundredGigE1/0/2] ptp enable

[DeviceB-HundredGigE1/0/2] quit

Configuring Device C

# Specify the IEEE 1588v2 PTP profile.

<DeviceC> system-view

[DeviceC] ptp profile 1588v2

# Specify the OC clock node type.

[DeviceC] ptp mode oc

# Configure the source IP address for multicast PTP message transmission over IPv4 UDP.

[DeviceC] ptp source 10.10.3.1

# Specify PTP for obtaining the time on the default MDC.

[DeviceC] clock protocol ptp mdc 1

# On HundredGigE 1/0/1, specify the IPv4 UDP transport protocol and the peer delay measurement mechanism (p2p), and enable PTP.

[DeviceC] interface hundredgige 1/0/1

[DeviceC-HundredGigE1/0/1] ptp transport-protocol udp

[DeviceC-HundredGigE1/0/1] ptp delay-mechanism p2p

[DeviceC-HundredGigE1/0/1] ptp enable

[DeviceC-HundredGigE1/0/1] quit

Verifying the configuration

When the network topology is stable, perform the following tasks to verify the PTP configuration:

·     Use the display ptp clock command to display PTP clock information.

·     Use the display ptp interface brief command to display brief information about PTP interfaces.

# Display PTP clock information on Device A.

[DeviceA] display ptp clock

PTP profile         : IEEE 1588 Version 2

PTP mode            : OC

Slave only          : No

Sync uncertain      : Disabled

Clock state         : Disabled

Clock ID            : 000FE2-FFFE-FF0000

Clock type          : Local

Clock domain        : 0

Number of PTP ports : 1

Priority1     : 128

Priority2     : 128

Clock quality :

 Class                 : 248

 Accuracy              : 32

 Offset (log variance) : 65535

Offset from master : 0 (ns)

Mean path delay    : 0 (ns)

Steps removed      : 0

Local clock time   : Sun Jan 15 20:57:29 2011

Clock source info:

 Clock   Pri1 Pri2 Accuracy Class TimeSrc Direction In-Status Offset(log variance)

 -------------------------------------------------------------------

 Local   128  128  32       248   160     N/A       N/A       65535    

 ToD0    128  128  32       6     32      N/A       Inactive  65535    

 ToD1    128  128  32       6     32      N/A       Inactive  65535  

# Display brief information about PTP interfaces on Device A.

[DeviceA] display ptp interface brief

Name         State         Delay mechanism  Clock step  Asymmetry correction

HGE1/0/1     Master        P2P              Two         0

# Display PTP clock information on Device B.

[DeviceB] display ptp clock

PTP profile         : IEEE 1588 Version 2

PTP mode            : P2PTC

Slave only          : No

Sync uncertain      : Disabled

Clock state         : Disabled

Clock ID            : 000FE2-FFFE-FF0001

Clock type          : Local

Clock domain        : 0

Number of PTP ports : 2

Priority1     : 128

Priority2     : 128

Clock quality :

 Class                 : 248

 Accuracy              : 32

 Offset (log variance) : 65535

Offset from master : N/A

Mean path delay    : N/A

Steps removed      : N/A

Local clock time   : Sun Jan 15 20:57:29 2011

Clock source info:

 Clock   Pri1 Pri2 Accuracy Class TimeSrc Direction In-Status Offset(log variance)

 -------------------------------------------------------------------

 Local   128  128  32       248   160     N/A       N/A       65535    

 ToD0    128  128  32       6     32      N/A       Inactive  65535    

 ToD1    128  128  32       6     32      N/A       Inactive  65535  

# Display brief information about PTP interfaces on Device B.

[DeviceB] display ptp interface brief

Name         State         Delay mechanism  Clock step  Asymmetry correction

HGE1/0/1     N/A           P2P              Two         0

HGE1/0/2     N/A           P2P              Two         0

# Display PTP clock information on Device C.

[DeviceC] display ptp clock

PTP profile         : IEEE 1588 Version 2

PTP mode            : OC

Slave only          : No

Sync uncertain      : Disabled

Clock state         : Disabled

Clock ID            : 000FE2-FFFE-FF0002

Clock type          : Local

Clock domain        : 0

Number of PTP ports : 1

Priority1     : 128

Priority2     : 128

Clock quality :

 Class                 : 248

 Accuracy              : 32

 Offset (log variance) : 65535

Offset from master : 0 (ns)

Mean path delay    : 0 (ns)

Steps removed      : 0

Local clock time   : Sun Jan 15 20:57:29 2019

Clock source info:

 Clock   Pri1 Pri2 Accuracy Class TimeSrc Direction In-Status Offset(log variance)

 -------------------------------------------------------------------

 Local   128  128  32       248   160     N/A       N/A       65535    

 ToD0    128  128  32       6     32      N/A       Inactive  65535    

 ToD1    128  128  32       6     32      N/A       Inactive  65535  

# Display brief information about PTP interfaces on Device C.

[DeviceC] display ptp interface brief

Name         State         Delay mechanism  Clock step  Asymmetry correction

HGE1/0/1     Slave         P2P              Two         0

The command outputs show that Device A is elected as the GM and HundredGigE 1/0/1 on Device A is the master port.

Configuration files

·     Device A:

#

 clock protocol ptp mdc 1

#

 ptp profile 1588v2

 ptp mode oc

 ptp source 10.10.10.1

#

interface hundredgige 1/0/1

 ptp delay-mechanism p2p

 ptp transport-protocol udp

 ptp enable

#

·     Device B:

#

 clock protocol ptp mdc 1

#

 ptp profile 1588v2

 ptp mode p2ptc

 ptp source 10.10.10.2

#

interface hundredgige 1/0/1

 ptp transport-protocol udp

 ptp enable

#

interface hundredgige 1/0/2

 ptp transport-protocol udp

 ptp enable

#

·     Device C:

#

 clock protocol ptp mdc 1

#

 ptp profile 1588v2

 ptp mode oc

 ptp source 11.10.10.1

#

interface hundredgige 1/0/1

 ptp delay-mechanism p2p

 ptp transport-protocol udp

 ptp enable

#

Example: Configuring Layer 3 IEEE 1588v2 PTP in unicast mode

Network configuration

As shown in Figure 3, a PTP domain contains Device A, Device B, and Device C. Configure Layer 3 IEEE 1588v2 PTP in unicast mode as follows for time synchronization:

·     Specify the IEEE 1588v2 PTP profile for the devices.

·     Specify the OC clock node type for Device A and Device C, and the E2ETC clock node type for Device B.

·     Configure the unicast PTP transport mode and IPv4 UDP transport protocol for the devices.

·     Configure the peer delay measurement mechanism (p2p) for Device A and Device C.

·     Configure Device A to receive ToD clock signals. Configure Device C to transmit clock signals to the base station.

Figure 3 Network diagram

 

Prerequisites

As shown in Figure 3, assign IP addresses to the interfaces and make sure the devices can reach each other. (Details not shown.)

Software version used

This configuration example was created and verified on R3606.

Restrictions and guidelines

When you configure Layer 3 IEEE 1588v2 PTP in unicast mode, follow these restrictions and guidelines:

·     The device does not provide ToD interfaces. It can be deployed as Device B or Device C but not Device A.

·     By default, interfaces on the device are disabled (in ADM or Administratively Down state). To have an interface operate, you must use the undo shutdown command to enable that interface.

Procedures

IMPORTANT

IMPORTANT:

The device does not provide ToD interfaces. It can be deployed as Device B or Device C but not Device A.

Configuring Device A

# Specify the IEEE 1588v2 PTP profile.

<DeviceA> system-view

[DeviceA] ptp profile 1588v2

# Specify the OC clock node type.

[DeviceA] ptp mode oc

# Configure the device to receive ToD clock signals and set the delay time correction to 1000 nanoseconds.

[DeviceA] ptp tod0 input delay 1000

# Set priority 1 to 0 for the ToD clock.

[DeviceA] ptp priority clock-source tod0 priority1 0

# On HundredGigE 1/0/1, specify the IPv4 UDP transport protocol and a unicast destination IP address for PTP messages and enable PTP.

[DeviceA] interface hundredgige 1/0/1

[DeviceA-HundredGigE1/0/1] ptp transport-protocol udp

[DeviceA-HundredGigE1/0/1] ptp unicast-destination 10.10.10.2

[DeviceA-HundredGigE1/0/1] ptp enable

[DeviceA-HundredGigE1/0/1] quit

Configuring Device B

# Specify the IEEE 1588v2 PTP profile.

<DeviceB> system-view

[DeviceB] ptp profile 1588v2

# Specify the E2ETC clock node type.

[DeviceB] ptp mode e2etc

# Specify PTP for obtaining the time on the default MDC.

[DeviceB] clock protocol ptp mdc 1

# On HundredGigE 1/0/1, specify the IPv4 UDP transport protocol and a unicast destination IP address for PTP messages and enable PTP.

[DeviceB] interface hundredgige 1/0/1

[DeviceB-HundredGigE1/0/1] ptp transport-protocol udp

[DeviceB-HundredGigE1/0/1] ptp unicast-destination 10.10.10.1

[DeviceB-HundredGigE1/0/1] ptp enable

[DeviceB-HundredGigE1/0/1] quit

# On HundredGigE 1/0/2, specify the IPv4 UDP transport protocol and a unicast destination IP address for PTP messages and enable PTP.

[DeviceB] interface hundredgige 1/0/2

[DeviceB-HundredGigE1/0/2] ptp transport-protocol udp

[DeviceB-HundredGigE1/0/2] ptp unicast-destination 11.10.10.1

[DeviceB-HundredGigE1/0/2] ptp enable

[DeviceB-HundredGigE1/0/2] quit

Configuring Device C

# Specify the IEEE 1588v2 PTP profile.

<DeviceC> system-view

[DeviceC] ptp profile 1588v2

# Specify the OC clock node type.

[DeviceC] ptp mode oc

# Specify PTP for obtaining the time on the default MDC.

[DeviceC] clock protocol ptp mdc 1

# On HundredGigE 1/0/1, specify the IPv4 UDP transport protocol and a unicast destination IP address for PTP messages and enable PTP.

[DeviceC] interface hundredgige 1/0/1

[DeviceC-HundredGigE1/0/1] ptp transport-protocol udp

[DeviceC-HundredGigE1/0/1] ptp unicast-destination 11.10.10.2

[DeviceC-HundredGigE1/0/1] ptp enable

[DeviceC-HundredGigE1/0/1] quit

Verifying the configuration

When the network topology is stable, perform the following tasks to verify the PTP configuration:

·     Use the display ptp clock command to display PTP clock information.

·     Use the display ptp interface brief command to display brief information about PTP interfaces.

# Display PTP clock information on Device A.

[DeviceA] display ptp clock

PTP profile         : IEEE 1588 Version 2

PTP mode            : OC

Slave only          : No

Sync uncertain      : Disabled

Clock state         : Disabled

Clock ID            : 000FE2-FFFE-FF0000

Clock type          : ToD0

 ToD direction  : In

 ToD delay time : 1000 (ns)

Clock domain        : 0

Number of PTP ports : 1

Priority1     : 0

Priority2     : 128

Clock quality :

 Class                 : 6

 Accuracy              : 32

 Offset (log variance) : 65535

Offset from master : 0 (ns)

Mean path delay    : 0 (ns)

Steps removed      : 0

Local clock time   : Sun Jan 15 20:57:29 2011

Clock source info:

 Clock   Pri1 Pri2 Accuracy Class TimeSrc Direction In-Status Offset(log variance)

 -------------------------------------------------------------------

 Local   128  128  32       248   160     N/A       N/A       65535    

 ToD0    128  128  32       6     32      N/A       Inactive  65535    

 ToD1    128  128  32       6     32      N/A       Inactive  65535  

# Display brief information about PTP interfaces on Device A.

[DeviceA] display ptp interface brief

Name         State         Delay mechanism  Clock step  Asymmetry correction

HGE1/0/1     Master        E2E              Two         0

# Display PTP clock information on Device B.

[DeviceB] display ptp clock

PTP profile         : IEEE 1588 Version 2

PTP mode            : E2ETC

Slave only          : No

Sync uncertain      : Disabled

Clock state         : Disabled

Clock ID            : 000FE2-FFFE-FF0001

Clock type          : Local

Clock domain        : 0

Number of PTP ports : 2

Priority1     : 128

Priority2     : 128

Clock quality :

 Class                 : 248

 Accuracy              : 32

 Offset (log variance) : 65535

Offset from master : N/A

Mean path delay    : N/A

Steps removed      : N/A

Local clock time   : Sun Jan 15 20:57:29 2011

Clock source info:

 Clock   Pri1 Pri2 Accuracy Class TimeSrc Direction In-Status Offset(log variance)

 -------------------------------------------------------------------

 Local   128  128  32       248   160     N/A       N/A       65535    

 ToD0    128  128  32       6     32      N/A       Inactive  65535    

 ToD1    128  128  32       6     32      N/A       Inactive  65535  

# Display brief information about PTP interfaces on Device B.

[DeviceB] display ptp interface brief

Name         State         Delay mechanism  Clock step  Asymmetry correction

HGE1/0/1     N/A           E2E              Two         0

HGE1/0/2     N/A           E2E              Two         0

# Display PTP clock information on Device C.

[DeviceC] display ptp clock

PTP profile         : IEEE 1588 Version 2

PTP mode            : OC

Slave only          : No

Sync uncertain      : Disabled

Clock state         : Disabled

Clock ID            : 000FE2-FFFE-FF0002

Clock type          : Local

Clock domain        : 0

Number of PTP ports : 1

Priority1     : 128

Priority2     : 128

Clock quality :

 Class                 : 248

 Accuracy              : 32

 Offset (log variance) : 65535

Offset from master : 0 (ns)

Mean path delay    : 0 (ns)

Steps removed      : 0

Local clock time   : Sun Jan 15 20:57:29 2019

Clock source info:

 Clock   Pri1 Pri2 Accuracy Class TimeSrc Direction In-Status Offset(log variance)

 -------------------------------------------------------------------

 Local   128  128  32       248   160     N/A       N/A       65535    

 ToD0    128  128  32       6     32      N/A       Inactive  65535    

 ToD1    128  128  32       6     32      N/A       Inactive  65535  

# Display PTP clock information on Device C.

[DeviceC] display ptp interface brief

Name         State         Delay mechanism  Clock step  Asymmetry correction

HGE1/0/1     Slave         E2E              Two         0

The command outputs show that Device A is elected as the GM and HundredGigE 1/0/1 on Device A is the master port.

Configuration files

·     Device A:

#

 ptp profile 1588v2

 ptp mode oc

 ptp tod0 input delay 1000

 ptp priority clock-source tod0 priority1 0

#

interface hundredgige 1/0/1

 ptp transport-protocol udp

 ptp unicast-destination 10.10.10.2

 ptp enable

#

·     Device B:

#

 clock protocol ptp mdc 1

#

 ptp profile 1588v2

 ptp mode e2etc

#

interface hundredgige 1/0/1

 ptp transport-protocol udp

 ptp unicast-destination 10.10.10.1

 ptp enable

#

interface hundredgige 1/0/1

 ptp transport-protocol udp

 ptp unicast-destination 11.10.10.1

 ptp enable

#

·     Device C:

#

 clock protocol ptp mdc 1

#

ptp profile 1588v2

 ptp mode oc

 ptp tod0 input delay 100

#

interface hundredgige 1/0/1

 ptp transport-protocol udp

 ptp unicast-destination 11.10.10.2

 ptp enable

#

Example: Configuring IEEE 802.1AS PTP

Network configuration

As shown in Figure 4, a PTP domain contains Device A, Device B, and Device C. Configure IEEE 802.1AS PTP as follows for time synchronization:

·     Specify the IEEE 802.1AS PTP profile for the devices.

·     Specify the OC clock node type for Device A and Device C, and the P2PTC clock node type for Device B. These clock nodes elect a GM through BMC based on their respective default GM attributes.

Figure 4 Network diagram

 

Software version used

This configuration example was created and verified on R3606.

Restrictions and guidelines

By default, interfaces on the device are disabled (in ADM or Administratively Down state). To have an interface operate, you must use the undo shutdown command to enable that interface.

Procedures

Configuring Device A

# Specify the IEEE 802.1AS PTP profile.

<DeviceA> system-view

[DeviceA] ptp profile 802.1AS

# Specify the OC clock node type.

[DeviceA] ptp mode oc

# Specify PTP for obtaining the time on the default MDC.

[DeviceA] clock protocol ptp mdc 1

# Enable PTP on HundredGigE 1/0/1.

[DeviceA] interface hundredgige 1/0/1

[DeviceA-HundredGigE1/0/1] ptp enable

[DeviceA-HundredGigE1/0/1] quit

Configuring Device B

# Specify the IEEE 802.1AS PTP profile.

<DeviceB> system-view

[DeviceB] ptp profile 802.1AS

# Specify the P2PTC clock node type.

[DeviceB] ptp mode p2ptc

# Specify PTP for obtaining the time on the default MDC.

[DeviceB] clock protocol ptp mdc 1

# Enable PTP on HundredGigE 1/0/1.

[DeviceB] interface hundredgige 1/0/1

[DeviceB-HundredGigE1/0/1] ptp enable

[DeviceB-HundredGigE1/0/1] quit

# Enable PTP on HundredGigE 1/0/2.

[DeviceB] interface hundredgige 1/0/2

[DeviceB-HundredGigE1/0/2] ptp enable

[DeviceB-HundredGigE1/0/2] quit

Configuring Device C

# Specify the IEEE 1588 802.1AS PTP profile.

<DeviceC> system-view

[DeviceC] ptp profile 802.1AS

# Specify the OC clock node type.

[DeviceC] ptp mode oc

# Specify PTP for obtaining the time on the default MDC.

[DeviceC] clock protocol ptp mdc 1

# Enable PTP on HundredGigE 1/0/1.

[DeviceC] interface hundredgige 1/0/1

[DeviceC-HundredGigE1/0/1] ptp enable

[DeviceC-HundredGigE1/0/1] quit

Verifying the configuration

When the network topology is stable, perform the following tasks to verify the PTP configuration:

·     Use the display ptp clock command to display PTP clock information.

·     Use the display ptp interface brief command to display brief information about PTP interfaces.

# Display PTP clock information on Device A.

[DeviceA] display ptp clock

PTP profile         : IEEE 802.1AS

PTP mode            : OC

Slave only          : No\

Sync uncertain      : Disabled

Clock state         : Disabled

Clock ID            : 000FE2-FFFE-FF0000

Clock type          : Local

Clock domain        : 0

Number of PTP ports : 1

Priority1     : 246

Priority2     : 248

Clock quality :

 Class                 : 248

 Accuracy              : 32

 Offset (log variance) : 16640

Offset from master : 0 (ns)

Mean path delay    : 0 (ns)

Steps removed      : 0

Local clock time   : Sun Jan 15 20:57:29 2011

Clock source info:

 Clock   Pri1 Pri2 Accuracy Class TimeSrc Direction In-Status Offset(log variance)

 -------------------------------------------------------------------

 Local   128  128  32       248   160     N/A       N/A       65535    

 ToD0    128  128  32       6     32      N/A       Inactive  65535    

 ToD1    128  128  32       6     32      N/A       Inactive  65535  

# Display brief information about PTP interfaces on Device A.

[DeviceA] display ptp interface brief

Name         State         Delay mechanism  Clock step  Asymmetry correction

HGE1/0/1     Master        P2P              Two         0

# Display PTP clock information on Device B.

[DeviceB] display ptp clock

PTP profile         : IEEE 802.1AS

PTP mode            : P2PTC

Slave only          : No

Sync uncertain      : Disabled

Clock state         : Disabled

Clock ID            : 000FE2-FFFE-FF0001

Clock type          : Local

Clock domain        : 0

Number of PTP ports : 2

Priority1     : 246

Priority2     : 248

Clock quality :

 Class                 : 248

 Accuracy              : 32

 Offset (log variance) : 16640

Offset from master : N/A

Mean path delay    : N/A

Steps removed      : N/A

Local clock time   : Sun Jan 15 20:57:29 2011

Clock source info:

 Clock   Pri1 Pri2 Accuracy Class TimeSrc Direction In-Status Offset(log variance)

 -------------------------------------------------------------------

 Local   128  128  32       248   160     N/A       N/A       65535    

 ToD0    128  128  32       6     32      N/A       Inactive  65535    

 ToD1    128  128  32       6     32      N/A       Inactive  65535  

# Display brief information about PTP interfaces on Device B.

[DeviceB] display ptp interface brief

Name         State         Delay mechanism  Clock step  Asymmetry correction

HGE1/0/1     N/A           P2P              Two         0

HGE1/0/2     N/A           P2P              Two         0

# Display PTP clock information on Device C.

[DeviceC] display ptp clock

PTP profile         : IEEE 802.1AS

PTP mode            : OC

Slave only          : No

Sync uncertain      : Disabled

Clock state         : Disabled

Clock ID            : 000FE2-FFFE-FF0002

Clock type          : Local

Clock domain        : 0

Number of PTP ports : 1

Priority1     : 128

Priority2     : 128

Clock quality :

 Class                 : 248

 Accuracy              : 32

 Offset (log variance) : 65535

Offset from master : 0 (ns)

Mean path delay    : 0 (ns)

Steps removed      : 0

Local clock time   : Sun Jan 15 20:57:29 2019

Clock source info:

 Clock   Pri1 Pri2 Accuracy Class TimeSrc Direction In-Status Offset(log variance)

 -------------------------------------------------------------------

 Local   128  128  32       248   160     N/A       N/A       65535    

 ToD0    128  128  32       6     32      N/A       Inactive  65535    

 ToD1    128  128  32       6     32      N/A       Inactive  65535  

# Display brief information about PTP interfaces on Device C.

[DeviceC] display ptp interface brief

Name         State         Delay mechanism  Clock step  Asymmetry correction

HGE1/0/1     Slave           P2P              Two         0

The command outputs show that Device A is elected as the GM and HundredGigE 1/0/1 on Device A is the master port.

Configuration files

·     Device A and Device C:

#

 clock protocol ptp mdc 1

#

 ptp profile 8021as

 ptp mode oc

#

interface hundredgige 1/0/1

 ptp enable

#

·     Device B:

#

 clock protocol ptp mdc 1

#

 ptp profile 8021as

 ptp mode p2ptc

#

interface hundredgige 1/0/1

 ptp enable

#

interface hundredgige 1/0/1

 ptp enable

#

Related documentation

·     H3C S12500R Switch Router Series Network Management and Monitoring Configuration Guide-R3606

·     H3C S12500R Switch Router Series Network Management and Monitoring Command Reference-R3606

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