H3C Tests 400G Interconnection Capabilities on Real Devices

The H3C 400G data center switch and its 400G DSP & LPO optical module recently participated in an interoperability live demonstration. The H3C S9827-128DH high-density 400G intelligent computing switch will undergo joint testing with various modules from numerous optical module manufacturers. The on-site testing will focus on analyzing optical eye diagrams and bit error rates to verify the capability of H3C switches in utilizing DSP and LPO technologies. This initiative aims to enhance high-speed optical interconnection in the intelligent computing era and to explore new possibilities for the future.

With the rapid development of AI technology, the global intelligent computing data center is moving towards larger-scale construction, which also drives the key optical module components of data transmission to develop towards higher speed, lower power consumption and lower latency technology:

1) Higher serdes rate:

Serdes technology has promoted the evolution of single-channel 56G rate modules to single-channel 112G rate modules. High-speed modules such as QSFP112 VR4 and QSFP112 VR8 have matured, making network interconnection enter the 400G/800G era.

2) Lower power consumption LPO solution:

Traditional high-speed plug-in modules have gradually evolved from a technical solution that integrates DSP components to a linear direct-drive LPO solution without DSP chips. This technical solution can greatly reduce the power consumption and latency of the entire network system.

High-speed modules in intelligent computing networks are inseparable from network switch devices with strong system compatibility. For example, in the construction of a 10,000-card cluster, 80% of the high-speed modules will be used for communication between Spine-leaf and leaf-network cards through the high-speed ports of the switch devices. In order to be compatible with these high-speed modules of multiple specifications from multiple manufacturers, the switch needs to have strong software, hardware and engineering design capabilities:

1) High-quality high-speed signal intercommunication:

The single-channel SerDes rate has advanced to 112G, presenting significant challenges for host signal integrity design, particularly in the application of LPO modules. To ensure signal quality in complex scenarios such as multi-port connections and cross-board designs, the host design must tightly control insertion loss and return loss. Additionally, research and development engineers need to identify the most suitable parameter settings among various options for the high-speed switch chip. This is crucial for ensuring that the high-speed electrical signals output by the switch are fully compatible with multi-ecological high-speed optical modules at different ports. This situation poses a substantial challenge for selecting high-performance materials, manufacturing processes, simulation technologies, and precise design optimizations for the switch. It also demands extensive testing efforts and a wealth of development experience.

2) Intelligent and flexible identification application strategy:

H3C switches are compatible with a variety of mainstream optical modules, with flexible application modes (for example, supporting port speed reduction or splitting), while each manufacturer has its own application scenarios and understanding differences for MSA (for example, 200G modules have two protocols: CMIS and SFF 8636). Switches need to have more intelligent identification capabilities and reasonable identification strategies, as well as perfect software implementation methods, in order to successfully adapt to modules from multiple manufacturers and specifications, and support flexible operations such as port speed reduction, port splitting into two, and port splitting into four in applications.

To address the interconnection challenges in large-scale network construction, H3C has invested in the research and development of the S9827-128DH series of AI intelligent computing switches. These switches are built on 51.2 switching chips and developed by a skilled technical team with a forward-looking industry perspective. The H3C S9827-128DH features 128 400G ports, which can be fully equipped with high-speed 400G DSP and LPO modules. This design effectively resolves compatibility issues associated with multi-specification and multi-technology modules from various manufacturers.

In response to the demands of modern high-speed computing networks, this product offers an intelligent computing network capable of meeting the high-performance and high-speed requirements of AIGC for data center networks. It supports a maximum of over 8,000 400G ports or 16,000 200G ports in a single POD under a two-layer box-to-box networking setup, placing it well ahead of its competitors in the industry.